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700 mhz to 2700 mhz quadrature modulator data sheet ad8349 rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their re spective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2003 C 2012 analog devices, inc. all rights reserved. features output frequency range: 700 mhz to 2700 mhz modulation bandwidth: dc to 160 mhz (large signal bw) 1 db output compression: 5.6 dbm @ 2140 mhz output disable function: output below C 50 dbm in < 50 ns noise floor: C 156 dbm/hz phase quadrature error: 0.3 degrees @ 2140 mhz amplitude balance: 0.1 db single supply: 4.75 v to 5.5 v pin compatible with ad8345/ad8346s 16 - lead, exposed - paddle tssop package a pplications cellular/pcs co mmunication systems infrastructure wcdma/cdma2000/pcs/gsm/edge wireless lan/wireless local loop lmds/broadband wireless access systems f unctional b lock diagram figure 1. p roduct d escription the ad8349 is a silicon, monolithic, rf quadrature modulator that is designed for use from 700 mhz to 2700 mhz. its excellent phase accuracy and amplitude balance enable high performance direct rf modulation for communication systems. the differential lo input signal is buffered, and then split into an in - phase (i) signal and a quadrature - phase (q) signal using a polyphase phase splitter. these two lo signals are further buffered and then mixed with the corresponding i channel and q channel baseband signals in two gilbert cell mixers. the mixers outputs are then summed together in the output amplifier. the output amplifier is designed to drive 50 ? loads. the rf output can be switched on and off within 50 ns by applying a control pulse to the enop pin. the ad8349 can be used as a direct - to - rf modulator in digital communication systems such as gsm, cdma, and wcdma base stations, and qpsk or qam broad band wireless access transmitters. its high dynamic range and high modulation accuracy also make it a perfect if modulator in local multipoint distribution systems (lmds) using complex modulation formats. the ad8349 is fabricated using analog devices adva nced complementary silicon bipolar process, and is available in a 16 - lead, exposed - paddle tssop package. its performance is specified over a C 40c to +85c temperature range. ibbp ibbn com1 com1 loin qbbp qbbn com3 com3 vps2 loip vps1 enop vout com3 com2 03570-0-001 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 a d 8 3 4 9 phase splitter bias
ad8349 data sheet rev. b | page 2 of 28 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 product description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 5 esd caution .................................................................................. 5 pin configuration and function descriptions ............................. 6 equivalent circuits ........................................................................... 7 typical performance characteristics ............................................. 8 circuit description ......................................................................... 14 overview ...................................................................................... 14 lo interface................................................................................. 14 v-to-i converter ......................................................................... 14 mixers .......................................................................................... 14 d-to-s amplifier ......................................................................... 14 bias circuit .................................................................................. 14 output enable ............................................................................. 14 basic connections .......................................................................... 15 baseband i and q inputs ........................................................... 15 single-ended baseband drive .................................................. 15 lo input drive level ................................................................. 16 frequency range ........................................................................ 16 lo input impedance matching ................................................ 16 single-ended lo drive ............................................................. 17 rf output .................................................................................... 17 output enable ............................................................................. 17 baseband dac interface ........................................................... 18 ad9777 interface ....................................................................... 18 biasing and filtering .................................................................. 18 reducing undesired sideband leakage .................................. 19 reduction of lo feedthrough .................................................. 19 sideband suppression and lo feedthrough vs. temperature ................................................................................ 20 single sideband performance vs. baseband drive level ...... 20 improving third harmonic distortion .................................. 20 applications ..................................................................................... 21 3gpp wcdma single-carrier application ........................... 21 wcdma multicarrier application ........................................ 21 gsm/edge application ........................................................... 22 soldering information ............................................................... 23 lo generation using plls ....................................................... 23 transmit dac options ............................................................. 23 evaluation board ............................................................................ 24 characterization setups ................................................................. 26 ssb setup ..................................................................................... 26 outline dimensions ....................................................................... 27 ordering guide .......................................................................... 27 revision history 2/12rev. a to rev. b added epad note ............................................................................ 6 changes to ordering guide .......................................................... 27 11/04data sheet changed from rev. 0 to rev. a changes to figure 25 through figure 30 ..................................... 11 changes to figure 37 through figure 39 ..................................... 13 change to wcdma multicarrier application section ............ 21 change to figure 60 and figure 61 .............................................. 21 11/03revision 0: initial version
data sheet ad8349 rev. b | page 3 of 28 specifications v s = 5 v; ambient temperature (t a ) = 25c; lo = C 6 dbm; i/q inputs = 1.2 v p - p differential sine waves in quadrat ure on a 400 mv dc bias; baseband frequency = 1 mhz; lo source and rf output load impedances are 50 ? , unless otherwise noted. table 1 . parameter conditions min typ max unit operating frequency 700 2700 mhz lo = 900 mhz output power 1.5 4 6 dbm output p1 db 7.6 dbm carrier feedthrough C 45 C 30 dbm sideband suppression C 35 C 31 dbc third harmonic 1 p out C (f lo + (3 f bb )), p out = 4 dbm C 39 C 36 dbc output ip3 f1 bb = 3 mhz, f2 bb = 4 mhz, p out = - 4.2 dbm 21 dbm quadrature error 1.9 degree i/q amplitude balance 0.1 db noise floor 20 mhz offset from lo, all bb inputs 400 mv dc bias only C 155 dbm/hz 20 mhz offset from lo, bb inputs = 1.2 v p - p differential on 400 mv dc C 150 dbm/hz gsm sideband noise lo = 884.8 mhz, 6 mhz offset from lo, p out = 2 dbm C 152 dbc/hz lo = 1900 mhz output power 0 3.8 6 dbm output p1db 6.8 dbm carrier feedthrough C 38 dbm sideband suppression C 40 C 36 dbc third harmonic 1 p out C (f lo + (3 f bb )), p out = 3.8 dbm C 37 C 36 dbc output ip3 f1 bb = 3 mhz, f2 bb = 4 mhz, p out = C 4.5 dbm 22 dbm quadrature error 0.7 degree i/q amplitude balance 0.1 db noise floor 20 mhz offset from lo, all bb inputs 400 mv dc bias only C 156 dbm/hz 20 mhz offset from lo, bb inputs = 1.2 v p - p differential on 400 mv dc C 150 dbm/hz gsm sideband noise lo = 1960 mhz, 6 mhz offset from lo, p out = 2 dbm C 151 dbc/hz lo = 2140 mhz output power C 2 2.4 5.1 dbm output p1db 5.6 dbm carrier feedthrough C 42 C 30 dbm sideband suppression C 43 C 36 dbc third harmonic 1 p out C (f lo + (3 f bb )), p out = 2.4 dbm C 37 C 36 dbc output ip3 f1 bb = 3 mhz, f2 bb = 4 mhz, p out = C 6.5 dbm 19 dbm quadrature error 0.3 degree i/q amplitude balance 0.1 db noise floor 20 mhz offset from lo, all bb inputs 400 mv dc bias only C 156 dbm/hz 20 mhz offset from lo, bb inputs = 1.2 v p - p differential on 400 mv dc C 151 dbm/hz wcdma noise floor lo = 2140 mhz. 30 mhz offset from lo, p chan = C 17.3 dbm C 156 dbm/hz lo inputs pins loip and loin lo drive level characterization performed at typical level C 10 C 6 0 dbm nominal impedance 50 input return loss drive via 1:1 balun, lo = 2140 mhz C 8.6 db baseband inputs pins ibbp, ibbn, qbbp, qbbn i and q input bias level 400 mv input bias current 11 a input offset current 1.8 a bandwidth (0.1 db) lo = 1500 mhz, baseband input = 600 mv p - p sine wave on 400 mv dc 10 mhz lo = 1500 mhz, baseband input = 60 mv p - p sine wave on 400 mv dc 24 mhz
ad8349 data sheet rev. b | page 4 of 28 parameter conditions min typ max unit bandwidth (3 db) lo = 1500 mhz, baseband input = 600 mv p - p sine wave on 400 mv dc 160 mhz lo = 1500 mhz, baseband input = 60 mv p - p sine wave on 400 mv dc 340 mhz output enable pin enop off isolation enop low C 78 C 50 dbm turn - on settling time enop low to high (90% of envelope) 20 ns turn - off settling time enop high to low (10% of envelope) 50 ns enop high level (logic 1) 2.0 v enop low level (logic 0) 0.8 v power supplies pins vps1 and vps2 voltage 4.75 5.5 v supply current enop = high 135 150 ma enop = low 130 145 ma 1 the amplitude of the third harmonic relative to the single sideband power decreases with decreasing baseband drive level (see figure 19, figure 20, and figure 21).
data sheet ad8349 rev. b | page 5 of 28 absolute maximum rat ings table 2 . parameter rating supply voltage vpos 5.5 v ibbp, ibbn, qbbp, qbbn 0 v, 2.5 v loip and loin 10 dbm internal power dissipation 800 mw ja (exposed paddle soldered down) 30c/w maximum junction temperature 125c operating temperature range ? 40c to +85c storage temperature range ? 65c to +150c tresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specific ation is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution
ad8349 data sheet rev. b | page 6 of 28 pin configuration and fu nction descriptions figure 2. table 3. pin function descriptions pin no. mnemonic description equivalent circuit 1, 2, 15, 16 ibbp, ibbn, qbbn, qbbp differential in-phase and quad rature baseband inputs. these high impedance inputs must be dc-biased to approximately 400 mv dc, and must be driven from a low impedance source. nominal characterized ac signal swing is 600 mv p-p on each pin (100 mv to 700 mv). this results in a differential drive of 1.2 v p-p with a 400 mv dc bias. these inputs are not self-biased and must be externally biased. circuit a 3, 4 com1 common pin for lo phase splitter and lo buffers. com1, com2, and com3 should all be connected to a ground plane via a low impedance path. 5, 6 loin, loip differential local oscillator inputs. interna lly dc-biased to approximately 1.8 v when v s = 5.0 v. pins must be ac-coupled. single-ended drive is possible with degradation in performance. circuit b 7 vps1 positive supply voltage (4.75 v to 5.5 v) for the lo bias-cell and buffer. vps1 and vps2 should be connected to the same supply. to ensure adequate external bypassing, connect 0.1 f and 100 pf capacitors between vps1 and ground. 8 enop output enable. this pin can be used to enable or disable the rf output. connect to high logic level for normal operation. connect to low logic level to disable output. circuit c 9 com2 common pin for the output amplifier. com1, com2 , and com3 should all be connected to a ground plane via a low impedance path. 10, 13, 14 com3 common pin for input v-to-i converters and mixer cores. com1, com2, and com3 should all be connected to a ground plane via a low impedance path. 11 vout device output. single-ended, 50 internally biased rf output. pin must be ac-coupled to the load. circuit d 12 vps2 positive supply voltage (4.75 v to 5.5 v) for the baseband input v-to-i converters, mixer core, band gap reference, and output amplifer. vps1 and vps2 should be connected to the same supply. to ensure adequate external bypassing, connect 0.1 f and 100 pf capacitors between vps2 and ground. ep exposed paddle. connect to the grou nd plane via a low impedance path. notes 1. connect exposed pad to the ground lane via a low impedance path. ad8349 top view (not to scale) ibbp 1 ibbn 2 com1 3 com1 4 loin 5 qbbp qbbn com3 com3 vps2 15 14 13 12 loip 6 vps1 7 enop 8 vout com3 com2 11 10 9 16 03570-0-002
data sheet ad8349 rev. b | page 7 of 28 equivalent circuits figure 3 . circuit a figure 4 . circuit b figure 5 . circuit c figure 6 . circuit d vps2 ibbp com3 03570-0-003 vps1 loin loip com1 03570-0-004 04500-0-005 vps2 enop com3 03570-0-006 40? 40? vout com2 vps2
ad8349 data sheet rev. b | page 8 of 28 typical performance characteristics figure 7. single sideband (ssb) output power (p out ) vs. lo frequency (f lo ) (i and q inputs driven in quadrature at baseband frequency (f bb ) = 1 mhz, i and q inputs at 1.2 v p-p differential, t a = 25c) figure 8. i and q input bandwidth normalized to gain @ 1 mhz (f lo = 1500 mhz, t a = 25c) figure 9. ssb p out vs. temperature (f lo = 2140 mhz, f bb = 1 mhz, i and q inputs driven in quadrature at 1.2 v p-p differential) figure 10. ssb output 1 db compression point (op1db) vs. f lo (f bb = 1 mhz, i and q inputs driven in quadrature , t a = 25c) figure 11. carrier feedthrough vs. f lo (f bb = 1 mhz, i and q inputs driven in quadrature at 1.2 v p-p differential, t a = 25c) figure 12. carrier feedthrough vs. temperature (f lo = 2140 mhz, f bb = 1 mhz, i and q inputs driven in quadra ture at 1.2 v p-p differential, t a = 25c) ?4 ?2 0 ?1 ?3 2 1 ssb output power (dbm) 4 3 6 5 8 7 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 lo frequency (mhz) 03570-0-007 v s = 4.75v v s = 5.25v v s = 5v ?10 ?9 ?7 ?3 ?1 1 ?5 ?8 ?4 ?2 0 ?6 output power variation (db) 03570-0-008 baseband frequency (mhz) 1 10 1000 100 600mv p-p 60mv p-p 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 ssb output power (dbm) ?40?30?20?100 10203040 temperature ( ?c) 6050 70 80 03570-0-009 v s = 5v v s = 5.25v v s = 4.75v ?4 ?3 ?1 3 5 7 8 10 1 ?2 2 4 6 0 1db output compression (dbm) 9 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 lo frequency (mhz) 03570-0-010 t = +85 ? c t = +25 ? c t = ?40 ? c ?60 ?55 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 carrier feedthrough (dbm) 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 lo frequency (mhz) 03570-0-011 v s = 5v v s = 4.75v v s = 5.25v ?50 ?48 ?46 ?20 carrier feedthrough (dbm) ?44 ?42 ?40 ?38 ?36 ?34 ?32 ?30 ?28 ?26 ?24 ?22 ?40?30?20?100 10203040 temperature ( ? c) 6050 70 80 03570-0-012 v s = 5v v s = 5.25v v s = 4.75v
data sheet ad8349 rev. b | page 9 of 28 figure 13 . sideband suppression vs. f lo (f bb = 1 mhz, i and q inputs driven in quadrature at 1.2 v p - p differential, t a = 25c) figure 14 . sideband suppression vs. f bb (f lo = 2140 mhz, i and q inputs driven i n quadrature at 1.2 v p - p differential, t a = 25c) figure 15 . sideband suppression vs. temperature (f lo = 2140 mhz, f bb = 1 mhz, i and q inputs driven in quadrature at 1.2 v p - p differential) figure 16 . third order distortion vs. f lo (f bb = 1 mhz, i and q inputs driven in quadrature at 1.2 v p - p differential, t a = 25c) figure 17 . third order distortion vs. f bb (f lo = 2140 mhz, i and q inputs driven in quadrature at 1.2 v p - p differential, t a = 25c) figure 18 . third order distortion vs. temperature (f lo = 2140 mhz, f bb = 1 mhz, i and q inputs driven in quadrature at 1.2 v p - p differential) sideband suppression (dbc) ?60 ?55 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 lo frequency (mhz) 03570-0013 v s = 5v v s = 4.75v v s = 5.25v ?60 ?55 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 sideband suppression (dbc) baseband frequency (mhz) 1 10 100 03570-0-014 v s = 5v v s = 5.25v v s = 4.75v ?60 ?55 ?50 ?45 ?40 ?35 ?30 sideband suppression (dbc) ?40 ?30 ?20 ?10 0 10 20 30 40 temperature ( c) 60 50 70 80 03570-0-015 v s = 5v v s = 5.25v v s = 4.75v third order distortion (dbc) ?60 ?55 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 lo frequency (mhz) 03570-0016 v s = 5v v s = 4.75v v s = 5.25v ?60 ?55 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 third order distortion (dbc) baseband frequency (mhz) 1 10 100 03570-0-017 v s = 5v v s = 5.25v v s = 4.75v ?60 ?55 ?50 ?45 ?40 ?35 ?30 third order distortion (dbc) ?40 ?30 ?20 ?10 0 10 20 30 40 temperature ( c) 60 50 70 80 03570-0-018 v s = 5v v s = 5.25v v s = 4.75v
ad8349 data sheet rev. b | page 10 of 28 figure 19 . third or der distortion (3usb), carrier feedthrough, sideband suppression, and ssb p out vs. baseband differential input level (f lo = 900 mhz, f bb = 1 mhz, i and q inputs driven in quadrature, t a = 25c) figure 20 . third order distortion (3usb), carrier feedthrough, sideband suppression, and ssb p out vs. baseband differential input level (f lo = 1900 mhz, f bb = 1 mhz, i and q inputs driven in quadrature, t a = 25c) figure 21 . third order distortion (3usb), carrier feedthrough, sideband suppression, and ssb p out vs. baseband differential input level (f lo = 2140 mhz, f bb = 1 mhz, i and q inputs driven in quadrature, t a = 25c) figure 22 . power supply current vs. temperature figure 23 . smith chart of loip port s 11 (loin pin ac - coupled to ground). curves with balun and external termination resistors also shown (t a = 25c) figure 24 . return loss ? s 22 ? of v out output (t a = 25c) ?70 ?60 ?50 ?55 ?65 ?40 ?45 ?30 ?35 ?20 ?25 ?10 ?15 ? 14 ?10 ?6 ?8 ?12 ?2 ?4 2 0 6 4 10 8 0.2 0.4 0.6 0.8 1.0 1.4 2.4 1.2 1.6 1.8 2.0 2.6 2.8 3.0 baseband differential input voltage (v p-p) 2.2 03570-0-019 ssb, dbm 3usb, dbc usb, dbc lo, dbm ?70 ?60 ?50 ?55 ?65 ?40 ?45 ?30 ?35 ?20 ?25 ?10 ?15 ? 14 ?10 ?6 ?8 ?12 ?2 ?4 2 0 6 4 10 8 0.2 0.4 0.6 0.8 1.0 1.4 2.4 1.2 1.6 1.8 2.0 2.6 2.8 3.0 baseband differential input voltage (v p-p) 2.2 03570-0-020 lo, dbm usb, dbc 3usb, dbc ssb, dbm ?70 ?60 ?50 ?55 ?65 ?40 ?45 ?30 ?35 ?20 ?25 ?10 ?15 ? 14 ?10 ?6 ?8 ?12 ?2 ?4 2 0 6 4 10 8 0.2 0.4 0.6 0.8 1.0 1.4 2.4 1.2 1.6 1.8 2.0 2.6 2.8 3.0 baseband differential input voltage (v p-p) 2.2 03570-0-021 ssb, dbm 3usb, dbc lo, dbm usb, dbc 110 115 120 125 130 135 160 supply current (ma) 140 145 150 155 ?40 ?30 ?20 ? 10 0 10 20 30 40 temperature ( c) 60 50 70 80 03570-0-022 v s = 5v v s = 5.25v v s = 4.75v 03570-0023 500? 200? no termination 03570-0-024 ?40 ?35 ?30 ?25 ?20 ?15 return loss (db) ?10 ?5 0 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 frequency (mhz) v s = 5v
data sheet ad8349 rev. b | page 11 of 28 figure 25 . 20 mhz offset noise floor distribution at f lo = 900 mhz (bb inputs at a bias of 400 mv with no ac signal, t a = 25c) figure 26 . 20 mhz offset noise floor distribution at f lo = 1900 mhz (bb inputs at a bias of 400 mv with no ac signal, t a = 25c) figure 27 . 20 mhz offset noise floor distribution at f lo = 2140 mhz (bb inputs at a bias of 400 mv with no ac signal, t a = 25c) figure 28 . 20 mhz offset noise floor distribution at f lo = 940 mhz (f bb = 1 mhz, i and q inputs driven in quadrature at 1.2 v p - p, t a = 25c) figure 29 . 20 mhz offset noise floor distribution at f lo = 1960 mhz (f bb = 1 mhz, i and q inputs driven in quadrature at 1.2 v p - p, t a = 25c) figure 30 . 20 mhz offset noise floor distribution at f lo = 2140 mhz (f bb = 1 mhz, i and q inputs driven in quadrature at 1.2 v p - p, t a = 25c) 0 2 4 6 22 24 26 28 30 20 8 10 12 14 16 18 percentage ?157.0 ?155.5 ?155.0 ?154.5 ?154.0 ?153.5 ?153.0 ?156.0 ?156.5 noise floor (dbm/hz) 03570-0-025 0 2 4 6 22 24 26 28 30 percentage 20 8 10 12 14 16 18 ?158.0 ?156.5 ?156.0 ?155.5 ?155.0 ?154.5 ?154.0 ?157.0 ?157.5 noise floor (dbm/hz) 03570-0-026 0 2 4 6 22 24 26 28 30 percentage 20 8 10 12 14 16 18 ?159.0 ?157.5 ?157.0 ?156.5 ?156.0 ?155.5 ?155.0 ?158.0 ?158.5 noise floor (dbm/hz) 03570-0-027 0 2 4 6 8 10 12 14 16 18 20 percentage ?152.0 ?151.5 ?151.0 ?150.5 ?150.0 ?149.5 ?149.0 ?148.5 ?148.0 ?147.5 ?147.0 noise floor (dbm/hz) 03570-0-028 0 2 4 6 8 10 12 14 16 18 28 percentage ?152.5 ?151.5 ?151.0 ?150.5 ?150.0 ?149.5 ?149.0 ?148.5 ?152.0 ?148.0 noise floor (dbm/hz) 03570-0-029 24 22 26 20 0 2 4 6 22 24 26 28 30 20 8 10 12 14 16 18 percentage ?153.0 ?151.5 ?151.0 ?150.5 ?150.0 ?149.5 ?149.0 ?152.0 ?152.5 noise floor (dbm/hz) 03570-0-030
ad8349 data sheet rev. b | page 12 of 28 figure 31 . 20 mhz offset noise floor vs. lo input power (f lo = 2140 mhz, t a = 25c) figure 32 . carrier feedthrough vs. lo input power (f bb = 1 mhz, i and q inputs driven in quadrature at 1.2 v p - p differential, t a = 25c) figure 33 . sideband suppression vs. lo input power (f bb = 1 mhz, i and q inputs driven in quadratu re at 1.2 v p - p differential, t a = 25c) figure 34 . i and q inputs quadrature phase imbalance distribution (f lo = 2140 mhz, f bb = 1 mhz, i and q inputs driven in quadrature at 1.2 v p - p differential, t a = 25c) figure 35 . i and q inputs amplitude imbalance distribution (f lo = 2140 mhz, f bb = 1 mhz, i and q inputs driven in quadrature at 1.2 v p - p differential, t a = 25c) figure 36 . op1db distribution. (f lo = 2140 m hz, f bb = 1 mhz, i and q inputs driven in quadrature, t a = 25c) ?160 ?158 ?154 ?146 ?142 ?140 ?150 ?156 ?148 ?144 ?152 noise floor (dbm/hz) lo input (dbm) ?10 2 03570-0-031 ?8 ?6 ?4 ?2 0 without ac input with ac input ?60 ?50 ?40 ?45 ?55 ?30 ?35 carrier feedthrough (dbm) ?20 ?25 ?10 ?15 ?6 ?4 ?10 ?8 ?2 0 2 lo input (dbm) 03570-0032 f lo = 2140mhz f lo = 900mhz f lo = 1900mhz ?60 ?50 ?40 ?45 ?55 ?30 ?35 sideband suppression (dbc) ?25 ?20 ?10 ?15 ?6 ?4 ?10 ?8 ?2 0 2 lo input (dbm) 03570-0033 f lo = 2140mhz f lo = 900mhz f lo = 1900mhz 0 5 10 15 20 25 30 35 percentage ?0 . 1 0 0 ?0 . 1 2 5 ?0 . 1 7 5 ?0 . 1 5 0 ?0 . 2 0 0 ?0 . 0 7 5 ?0 . 0 5 0 ?0 . 0 2 5 0 magnitude imbalance (db) 03570-0-034 0 5 10 15 20 25 30 35 percentage 0.50 0.75 0 0.25 1.00 1.25 1.50 phase (i-q) imbalance (degrees) 03570-0-035 0 5 10 15 20 25 30 35 percentage op1db (dbm) 5.0 4.5 5.5 6.0 6.5 03570-0-036
data sheet ad8349 rev. b | page 13 of 28 figure 37 . carrier feedthrough distribution at f lo = 900 mhz (f bb = 1 mhz, i and q inputs driven in quadrature at 1.2 v p - p, t a = 25c) figure 38 . carrier feedthrough distribution at f lo = 1900 mhz (f bb = 1 mhz, i and q inputs driven in quadrature at 1.2 vp - p, t a = 25c) figure 39 . carrier feedthrough distribution at f lo = 2140 mhz (f bb = 1 mhz, i and q inputs driven in quadrature at 1.2 v p - p, t a = 25c) figure 40 . carrier feedthrough distribution at temperature extremes, after carrier feedthrough nulled to < - 65 dbm at t a = 25c. (f lo = 2140 mhz, i and q inputs at a bias of 400 mv) figure 41 . sideband suppression distribution at temperature extremes, after sideband suppression nulled to < - 50 dbc at t a = 25c. (f lo = 2140 mhz, f bb = 1 mhz, i and q inputs biased at 0.4 v) 0 2 4 6 8 10 12 14 16 18 20 percentage ?80 ?70 ?60 ?50 ?40 ?30 carrier feedthrough (dbm) 03570-0-039 0 5 10 15 20 25 30 35 40 percentage ?60 ?45 ?40 ?35 ?30 ?25 carrier feedthrough (dbm) ?55 ?50 03570-0-040 carrier feedthrough (dbm) percentage 24 22 20 18 16 14 12 10 8 6 4 2 0 ?70 ?65 ?60 ?55 ?50 ?45 ?40 ?35 ?30 03570-0-041 0 5 10 15 20 25 30 35 percentage ?70 ?65 ?60 ?55 ?50 ?45 carrier feedthrough (dbm) after nulling to < ?65dbm at +25c t = ?40c t = +85c 03570-0-037 percentage 0 4 8 12 16 20 24 30 2 6 10 14 18 22 28 26 ?75 ?65 ?60 ?55 ?50 ?35 sideband suppression (dbc) after nulling to < ?50dbc at +25c ?70 ?40 ?45 03570-0-038 t = ?40c t = +85c
ad8349 data sheet rev. b | page 14 of 28 circuit description overview the ad8349 can be divided into five sections: the local oscil - lator (lo) interface, the baseband voltage - to - current (v - to - i) converter, the mixers, the different ial - to - single - ended (d - to - s) amplifier, and the bias circuit. a detailed block diagram of the device is shown in figure 42. figure 42 . block diagram the lo interface generates two lo signals at 90 degrees of phase difference to drive two mixers in quadrature. baseband signals are converted into currents by the v - to - i converters, which feed into the two mixers. the outputs of the mixers combine to feed the differential - to - single - ended amplifier, which provides a 50 ? output interface. reference currents to each section are generated by the bias circuit. additionally, the rf output is controlled by an output enable pin (enop), which is capable of switching the output on and off within 50 ns. a detailed description of each section follows. lo interface the lo interface consists of interleaved stages of buffer amplifiers and polyphase phase splitters. an input buffer provides a 50 ? termination to the lo signal source driving loip and loin. the buffer also increases the lo signal amplitude to drive the phase splitter. the phase splitter is formed by an r - c polyphase network that splits the buffered lo signal into two parts in precise quadrature phase relation with each other. each lo signal then passes through a buffer amplifier to compensate for the signal loss through the phase splitter. the two signals pass through another polyphase network to enhance the quadrature accuracy over the full operating frequency range. the outputs of the second phase splitter are fed into the driver amplifiers for the mixers lo inputs. v - to - i converter the differential baseband input voltages that are a pplied to the baseband input pins are fed to two op amps that perform a differential voltage - to - current conversion. the differential output currents of these op amps then feed each of their respective mixers. mixers the ad8349 has two double - balanced mixer s, one for the in - phase channel (i channel) and one for the quadrature channel (q channel). both mixers are based on the gilbert cell design of four cross - connected transistors. the output currents from the two mixers sum together in a pair of resistor - ind uctor (r - l) loads. the signals developed across the r - l loads are sent to the d - to - s amplifier. d- to - s amplifier the output d - to - s amplifier consists of two emitter followers driving a totem pole output stage. output impedance is estab - lished by the emitte r resistors in the output transistors. the output of this stage connects to the output (vout) pin. bias circuit a band gap reference circuit generates the proportional - to - absolute - temperature (ptat) reference currents used by different sections. the band g ap reference circuit also generates a temperature stable current in the v - to - i converters to produce a temperature independent slew rate. output enable during normal operation (enop = high), the output current from the v - to - i converters feeds into the mixe rs, where they mix with the two phases of lo signals. when enop is pulled low, the v - to - i output currents are steered away from the mixers, thus turning off the rf output. power to the final stage of lo drivers is also removed to minimize lo feedthrough. e ven when the output is disabled, the differential - to - single - ended stage is still powered up to maintain constant output impedance. p h a s e s p l i t t e r o u t l o i p l o i n i b b p i b b n q b b p q b b n 03570-0-043
data sheet ad8349 rev. b | page 15 of 28 basic connections the basic connections for operating the ad8349 are shown in figure 43 . a single power supply of between 4.75 v and 5.5 v is applied to pins vps1 and vps2. a pair of esd protection diodes connect internally between vps1 and vps2, so these must be tied to the same potential. both pins should be individually decoupled using 100 pf and 0.1 f capacitors to ground. these capacitors should be located as close as possible to th e device. for normal operation, the output enable pin, enop, must be pulled high. the turn - on threshold for enop is 2 v. pins com1, com2, and com3 should all be tied to the same ground plane through low impedance paths. baseband i and q inp uts the i and q inputs should be driven differentially. the typical differential drive level (as used for characterization measure - ments) for the i and q baseband signals is 1.2 v p - p, which is equivalent to 600 mv p - p on each baseband input. the base - band inputs have to be externally biased to a level between 400 mv and 500 mv. the optimum level for the best perfor - mance is 400 mv. the recommended drive level of 1.2 v p - p does not indicate a maximum drive level. if operation closer to compression is desired, the 1.2 v p - p differential limit can be exceeded. for baseband signals with a high peak - to - average ratio (e.g., cdda or wcdma), the peak signal level will have to be below the ad8349s compression level in order to prevent clipping of the signal peaks. clipping of sig nal peaks increases distortion. in the case of cdma and wcdma inputs, clipping results in an increase of signal leakage into adjacent channels. in general, the baseband drive should be at a level where the peak signal power of the output signal is at leas t a crest factor below the ad8349s output compression point. refer to the applications section for drive - level considerations in wcdma and gsm/edge systems. reducing the baseband drive level also has the benefit of increasing the bandwidth of the baseband input. this would allow the ad8349 to be used in applications requiring a high modulation bandwidth, e.g., as the if modulator in high data - rate microwave radios. single - ended baseband drive where only single - ended i and q signals are available, a differ ential amplifier, such as the ad8132 or ad8138, can be used to generate the required differential drive signal for the ad8349. figure 44 shows an example of a circuit th at converts a ground - referenced, single - ended signal to a differential signal, and adds the required 400 mv bias voltage. the baseband inputs can also be driven with a single - ended signal biased to 400 mv, with the unused inputs biased to 400 mv dc. this mode of operation is not recommended, however, because any dc level difference between the bias level of the drive signal a nd the dc level on the unused input (including the effect of temperature drift), can result in increased lo feedthrough. additionally, the maximum low distortion output power will be reduced by 6 db. figure 43 . basic connections ibbp ibbn com1 com1 loin qbbp qbbn com3 com3 vps2 loip vps1 enop vout com3 com2 03570-0-044 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 1 2 3 4 5 6 7 8 a d 8 3 4 9 t1 etc1-1-13 1 5 3 2 4 100pf 0.1f 100pf qp qn +v s vout 100pf 100pf +v s lo in ip 0.1f 100pf 200? 200?
ad8349 data sheet rev. b | page 16 of 28 figure 44 . single - ended iq drive circuit lo input drive level the local oscillator inputs are designed to be driven differen - tially. the device is specified with an lo drive level of C 6 dbm. this level was chosen to provide the best noise performance. increasing the lo drive level degrades sideband suppression and increases carrier feedthrough, while improving noise performance. reducing the lo drive level creates th e opposite effect: improved sideband suppression and reduced carrier feedthrough. frequency range the lo frequency range is from 700 mhz to 2700 mhz. these limits are defined by the nature of the lo phase splitter circuitry. the phase splitter generates l o drive signals for the internal mixers, which are 90 degrees out of phase from each other. outside of the specified frequency range (700 mhz to 2700 mhz), this quadrature accuracy degrades, resulting in poor sideband rejection performance. figure 45 and figure 46 show the sideband suppression of a typical device operating outside the specified lo frequency range. the level of sideband suppression and degradation is also influenced by manufac - turing process variations. lo input impedance m atching single - ended lo sources are transformed into a differential signal via a 1:1 balun (etc1 - 1 - 13). a 200 ? shunt resistor to gnd on each lo input on t he device side of the balun reduces the return loss for the lo input port. because the lo input pins are internally dc - biased, ac coupling capacitors must be used on each lo input pin. 03570-0-045 a d 8 3 4 9 phase splitter loin loip vout vps1 vps2 ibbp ibbn qbbp qbbn 0.1f 100pf 100pf 0.1f 0.1f 10f 3 6 5 4 1 8 a d 8 1 3 2 2 i in 499? 499? 0.1f +5v 499? 24.8? 49.9? 499? 10k? 866? 10f 0.1f 3 6 5 4 1 8 a d 8 1 3 2 2 q in 499? 499? 0.1f +5v 499? 24.9? 49.9? 499? + + com1 com2 com3 10f 0.1f + ?5v 10f 0.1f + ?5v
data sheet ad8349 rev. b | page 17 of 28 figure 45 . sideband suppression below 700 mhz figure 46 . sideband suppression above 2700 mhz single - ended lo drive the lo input can be driven single - ended at the expense of higher lo feedthrough at most frequenc ies (see figure 48 ). loin is ac - coupled to ground, and loip is driven through a coupling capacitor from a single - ended 50 ? source (see figure 47 ). a 400 ? shunt resistor on the signal - source side of the ac coupling capacitor was used for the measurement. figure 47 . schematic for single - ended lo drive figure 48 . lo feedthrough vs. frequency, single - ended vs. differential lo drive (single - sideband modulation) rf output the rf output is designed to drive a 50 ? load, but should be ac - coupled, as shown in figure 43 , because of internal dc biasing. the rf output impedance is close to 50 ? and provides fairly good return loss over the specified operating frequency range (see figure 24 ). as a result, no additional matching circuitry is required if the output is driving a 50 ? load. the output power of the ad8349 under nominal conditions (1.2 v p - p differential baseband drive, 400 mv dc baseband bias, and a 5 v supply) is shown in figure 7 . output enable the enop pin can be used to turn the rf output on and off . this pin should be held high (greater than 2 v) for normal operation. taking enop low (less than 800 mv) disables the output power and provides an off - isolation level of < C 50 dbm at the output. figure 49 and figure 50 show the enable and disable time domain responses of the enop function at 900 mhz. typical enable and disable time s are approximately 20 ns and 50 ns, respectively. figure 49 . enop enable time, 900 mhz 03570-0-046 1.0 1.5 2.0 2.5 3.0 3.5 4.0 300 350 400 450 500 550 600 650 700 lo frequency (mhz) ssb output power (dbm) ?60 ?50 ?40 ?30 ?20 ?10 0 sideband suppression (dbc) ssb usb 03570-0-047 ?1 0 lo frequency (mhz) ssb output power (dbm) ?44 ?43 ?42 ?41 ?40 sideband suppression (dbc) usb ssb ?8 ?7 ?6 ?5 ?4 ?3 ?2 ?45 ?46 ?48 ?47 2700 2750 2800 2850 2900 2950 3000 ad8349 loin loip 5 6 lo 100pf 400? 100pf 03570-0-048 ?60 ?55 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 carrier feedthrough (dbm) 700 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 lo frequency (mhz) single-ended lo drive differential lo drive 03570-0-049 03570-0-050 ?8 ?4 ?2 ?6 0 v enop (v) 4 2 8 6 ?800 ?400 ?200 ?600 0 v vout (mv) 400 200 800 600 time (ns) 0 20 100 40 60 80
ad8349 data sheet rev. b | page 18 of 28 figure 50. enop disable time, 900 mhz baseband dac interface the recommended baseband input swing and bias levels of the ad8349s differential baseband inputs allow for direct connection to most baseband dacs without the need for any external active components. typically these dacs have a differential full-scale output current from 0 ma to 20 ma on each differential output. these currents can be easily converted to voltages using ground-referenced shunt resistors. most baseband dacs for transmit chains are designed with two dacs in a single package. ad9777 interface the ad977x family of dual dacs is well suited to driving the baseband inputs of the ad8349. the ad9777 is a dual 16-bit dac that can generate either a baseband output or a complex if using the devices complex modulator. the basic interface between the ad9777s i out outputs and the ad8349s differential baseband inputs is shown in figure 51. the resistors r1 and r2 set the dc bias level, and r3 sets the amplitude of the baseband input voltage swing. figure 51. basic ad9777 to ad8349 interface figure 52. relationship between r3 in figure 51 and peak baseband input voltage biasing and filtering a value of 40 on r1 and r2 in figure 51 will generate the required 400 mv dc bias. note that this is independent of the value of r3. figure 52 shows the relationship between the value of r3 and the peak baseband input voltage with the 40 resistors in place. from figure 52, it can be seen that a value of 240 will provide a peak-to-peak swing of approximately 1.2 v p-p differential into the ad8349s baseband inputs. the closest available resistor values are 40.2 and 240 , and these values were used in the characterization of the ad8349 when the dac was used as a signal source. when using a dac, low-pass image reject filters are typically used to eliminate images that are produced by the dac. they provide the added benefit of eliminating broadband noise that might feed into the modulator from the dac. figure 53 shows a single sideband spectrum at 2140 mhz. the baseband sine and cosine signals come from the digital output of a rohde & schwarz amiq arbitrary waveform generator. these signals drive the ad9777 dual dac, which in turn drives the ad8349s baseband inputs. note that the ad9777s complex modulator is not being used. due to offset voltages, internal device mismatch, and imperfect quadrature over the ad8349s operating range, the ssb spectrum has a number of undesirable components such as lo feedthrough and undesired sideband leakage. when the ad8349 is driven by a modulated baseband signal, (e.g. 8-psk, gmsk, qpsk, or qam), these nonidealities will manifest themselves as degraded error vector magnitude (evm) and degraded spectral purity. 03570-0-051 ?8 ?4 ?2 ?6 0 v enop (v) 4 2 8 6 ?800 ?400 ?200 ?600 0 v vout (mv) 400 200 800 600 time (ns) 0 20 100 40 60 80 optional low-pass filter 03570-0-052 r1q r2q r3q 69 68 16 15 i outb2 i outa2 qbbn qbbp 73 72 1 2 i outb1 i outa1 ibbn ibbp ad9777 ad8349 optional low-pass filter r1i r2i r3i 0.15 0.30 0.45 0.60 0.75 0.90 1.05 1.20 1.35 1.50 differential iq swing (v p-p) r3 (? ) 10 100 1.10 3 03570-0-053
data sheet ad8349 rev. b | page 19 of 28 figure 53 . ad8349 single sideband spectrum at 2140 mhz reducing undesired s ideband leakage undesired sideband leakage is the result of phase and amplitude imb alances between the i and q channel baseband signals. therefore, to reduce the undesired sideband leakage, the amplitude and phase of the baseband signals have to be matched at the mixer cores. because of mismatches in the baseband input paths leading to the mixers, perfectly matched baseband signals at the pins of the device may not be perfectly matched when they reach the mixers. therefore, slight adjustments have to be made to the phase and amplitudes of the baseband signals to compensate for these mism atches. begin by making one of the inputs, say the i channel, the reference signal. then adjust the amplitude and phase of the q channels signal until the unwanted sideband power reaches a trough. the ad9777 has built - in gain adjust registers that allow this to be performed easily. if an iterative adjustment is performed between the amplitude and the phase, the undesired sideband leakage can be minimized significantly. note that the compensated sideband rejection performance degrades as the operating base band frequency is moved away from the frequency at which the compensation was performed. as a result, the frequency of the i and q sine waves should be approximately half the baseband bandwidth of the modulated carrier. for example, if the modulator is bei ng used to transmit a single wcdma carrier whose baseband spectrum spans from dc to 3.84/2 mhz, the calibration could be effectively performed with 1 mhz i and q sine waves. reduction of lo feed through because the i and q signals are being multiplied with the lo, any internal offset voltages on these inputs will result in leakage of the lo to the output. additionally, any imbalance in the lo to rf in the mixers will also cause the lo signal to leak through the mixer to the rf output. the lo feedthrough is clearly visible in the single sideband spectrum. the nominal lo feedthrough of C 42 dbm can be reduced further by applying offset compensation voltages on the i and q inputs. note that the lo feedthrough is reduced by varying the differential offset volta ges on the i and q inputs (xbbp C xbbn), not by varying the nominal bias level of 400 mv. this is easily accomplished by programming and then storing the appropriate dac offset code required to minimize the lo feedthrough. this, however, requires a dc - coup led path from the dac to the i and q inputs. the procedure for reducing the lo feedthrough is simple. a differential offset voltage is applied from the i dac until the lo feedthrough reaches a trough. with this offset level held, a differential offset volt age is applied to the q dac until a lower trough is reached (this is an iterative process). figure 54 shows a plot of lo feedthrough vs. i channel offset (in mv) after the q channel offset has been nulled. this suggests that the compensating offset voltage should have a resolution of at least 100 v to reduce the lo feedthrough to be less than C 65 dbm. figure 55 shows the single sideband spectrum at 2140 mhz after the nulling of the lo. the reduced lo feedthrough can clearly be seen when compared with the performance shown in figure 53 . compensated lo feedthrough degrades somewhat as the lo frequency is moved away from the frequency at which the compensation was performed. this variation is very small across a 30 mhz or 60 mhz cellular band, however. this small variation is due to the effects of lo - to - rf output le akage around the package and on the board. figure 54 . plot of lo feedthrough vs. i channel baseband offset (q channel offset nulled) ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 amplitude (dbm) ssb = 1.7dbm lo = ?44.5dbm usb = ?52dbc third harmonic = ?36.8dbc 03570-0-054 center 2.14ghz span 10mhz ?70 ?60 ?58 ?56 ?54 ?52 carrier feedthrough (dbm) ?62 ?68 ?66 ?64 3.0 4.0 4.5 5.0 5.5 3.5 iopp-iopn (mv) 03570-0-055
ad8349 data sheet rev. b | page 20 of 28 figure 55 . ad8349 single sideband spectrum at 2140 mhz after lo nul ling sideband suppression and lo feedthrough vs. temperature in practical applications, reduction of lo feedthrough and undesired sideband suppression can be performed as a one time calibration, with the required correction factors being stored in nonvolat ile ram. these compensation schemes hold up well over temperature. figure 40 and figure 41 show the variation in lo feedthrough and sideband suppression over temperature after compensation is performed at 25c. single sideband perf orman ce vs. bas eband drive level figure 56 shows the ssb output power and noise floor in dbc/100 khz versus baseband drive level at lo frequencies of 940 mhz, 1960 mhz, and 2140 mhz. improving third harm onic distortion while sideband suppression can be improved by adjusting the relative baseband amplitudes and phase, the only means available to reduce the third harmonic is to reduce the output power. (see figure 19, figure 20 , and figure 21 ). it is worth noting, however, that as the output power is reduced, the noise floor, in dbc, stays fairly constant at the higher end of the power curve ( figure 56 ). this indicates that the output power can be reduced to a level that yields an acceptable third harmonic without incurring a signal - to - noise ratio penalty. the constant snr vs. output power relatio nship also indicates that baseband voltage variations can be effectively used to control system output power and/or regulate signal chain gain. figure 56 . ssb p out and 20 mhz noise floor vs. baseband drive level (f lo = 940 mhz, 1960 mhz, and 2140 mhz) ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 amplitude (dbm) center 2.14ghz span 10mhz 03570-0-077 ssb = 1.7dbm lo = ?71.4dbm usb = ?52dbc third harmonic = ?36.8dbc ?14 ?10 ?6 ? 8 ?12 ?2 ?4 4 2 6 0 ?104 ?90 ?86 ?88 ?84 ?102 ?100 ?98 ?96 ?94 ?92 0.2 0.3 0.4 0.5 0.8 0.6 0.9 1.0 1.2 1.1 0.7 03570-0-056 differential baseband drive (v p-p) ssb output power (dbm) 20 mhz noise floor (dbc/100khz) 940 ssb 1960 ssb 2140 ssb 1960 20 mhz noise 940 20 mhz noise 2140 20 mhz noise
data sheet ad8349 rev. b | page 21 of 28 applications 3gpp wcdma single - carrier application the interpolation filter used for the measurement of wcdma performance is shown in figure 57 . this third order bessel filter has a 3 db bandwidth of 12 mhz. while the 3gpp single channel bandwidth is only 3.84 mhz, this wide 3 db bandwidth of 12 mhz was driven by the need for a flat gro up delay out to at least half the bandwidth of the baseband signal. figure 58 shows a plot of a wcdma spectrum at 2140 mhz using the 3 gpp test model 1 (64 channels act ive). at an output power of C 17.3 dbm, an adjacent channel power ratio (acpr) just shy of C 69 dbc was measured. figur e 59 shows the variation in acpr with output power at 1960 mhz and 2140 mhz. it also shows the noise floor measured at an offset of 30 mhz from the center of the modu - lated wcdma signal. from the graphs, it can be seen that there is an optimal output power at which to operate that delivers the best acpr. if the output power is increased beyond that point, the acpr degrades as the result of increased distortion. below that optimum, the acpr degrades due to a reduction in the signal - to - noise ratio of the signal. figure 57 . single - carrier wcdma application circuit (dac - modulator interconnect) figure 58 . single - carrier wcdma spectral plot at 2140 mhz, including adjacent and alternate channel power ratio figur e 59 . single - carrier wcdma acpr and noise floor (dbm/hz) at 30 mhz carrier offset vs. channel power at 1960 mhz and 2140 mhz (test model 1 with 64 active channels) wcdma multicarrier a pplication the high dynamic range of the ad83 49 also permits use in multicarrier wcdma applications. figure 60 shows a 4 - carrier wcdma spectrum at 1960 mhz. at a per - carrier power of C 24.2 dbm, an acpr of C 60.4db is achieved. figure 61 shows the variation in acp and noise floor (dbc/hz) with output power. figure 60 . 4 - carrier wcdma spectral plot at 1 960 mhz, including adjacent and alternate channel power ratio 03570-0-058 680nh 680nh 100pf 40.2? 40.2? 240? 73 72 1 2 i outb1 i outa1 ibbn ibbp ad9777 ad8349 270pf 680nh 680nh 100pf 40.2? 40.2? 240? 69 68 16 15 i outb2 i outa2 qbbn qbbp 270pf ?130 ?120 ?110 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?33 amplitude (dbm) center 2.14ghz span 24.6848mhz 03570-0-059 ch pwr = ?17.3dbm adj cpr = ?68.7db alt cpr = ?72.7db alt lo adj lo ch adj up alt up ?72 ?71 ?70 ?69 ?68 ?67 ?66 ?65 ?64 ?63 ?62 ?26 ?24 ?22 ?20 ?18 ? 16 ?14 ?12 ?10 ?8 channel power (dbm) acpr (db) ?157 ?156 ?155 ?154 ?153 ?152 ?151 ?150 ?149 ?148 ?147 noise floor (dbm/hz) 2140 adj cpr 2140 noise 1960 noise 1960 adj cpr 03570-0-060 ?130 ?120 ?110 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 amplitude (dbm) center 1.96ghz span 40mhz 4mhz/ 03570-0-062 ch pwr = ?24.2dbm adj cpr = ?60.4db alt cpr = ?63.1db
ad8349 data sheet rev. b | page 22 of 28 figure 61 . 4 - carrier wcdma adjacent and alternate channel power ratio and 50 mhz noise floor (dbm/hz) vs. per - channel power at 1960 mhz and 2140 mhz gsm/edge appli cation figure 62 and figure 64 show plots of gmsk error vector magnitude (evm), spectral performance, and noise floor (db c/ 100 khz at 6 mhz carrier offset) at 885 mhz and 1960 mhz. based on spectral performance, a maximum output power level of around 2 dbm is appropriate. note, however, that as the output power decreases below this level, there is only a very slight increase in the dbc noise floor. this indicates that baseband drive variation can be used to control or correct the gain of the signal chain over a range of at least 5 db, with little or no snr penalty. figure 63 and figure 65 show plots of 8 - psk evm, spectral performance, and noise floor at 885 mhz and 1960 mhz. an lo drive level of a pproximately C 6 dbm is recommended for gmsk and 8 - psk. a higher lo drive power will improve the noise floor slightly; however, it also tends to degrade evm. figure 62 .gmsk evm, spectral performance, and noise floor vs. channel p ower (frequency = 885 mhz) figure 63 . 8 - psk evm, spectral performance, and noise floor vs. channel power (frequency = 885 mhz) figure 64 . gmsk evm, spectral performance, and noise floor vs. channel po wer (frequency = 1960 mhz) figure 65 . 8 - psk evm, spectral performance, and noise floor vs. channel power (frequency = 1960 mhz) channel power (dbm) alt and adj cpr (db) 50mhz noise floor (dbm/hz) ?66 ?64 ?63 ?62 ?61 ?60 ?59 ?58 ?57 ?56 ?55 ?54 ?65 03570-0063 2140 adj cpr 2140 alt cpr 2140 noise 1960 alt cpr 1960 noise 1960 adj cpr ?156 ?154 ?152 ?150 ?148 ?146 ?144 ?29 ?28 ?27 ?26 ?25 ?24 ?23 ?22 ?21 ?20 ?19 ?18 ?17 ?110 ?90 ?80 ?85 ?100 ?70 ?75 400khz and 600khz spectral mask (dbc/30khz) 6mhz offset noise floor (dbc/100khz) ?60 ?65 ?50 ?55 ?95 ?105 1.0 1.5 2.0 2.5 3.0 3.5 4.0 evm% ?2 ?4 ?8 ?6 ?1 0 0 2 4 6 channel power (dbm) 03570-0065 peak noise floor 400khz 600khz average noise floor evm ?110 ?90 ?80 ?85 ?100 ?70 ?75 400khz and 600khz spectral mask (dbc/30khz) 6mhz offset noise floor (dbc/100khz) ?60 ?65 ?50 ?55 ?95 ?105 1.0 1.5 2.0 2.5 3.0 3.5 4.0 evm% ?6 ?8 ?1 2 ?1 0 ?1 4 ? 4 ?2 0 4 channel power (dbm) 2 03570-0066 peak noise floor 400khz 600khz average noise floor evm ?110 ?90 ?80 ?85 ?100 ?70 ?75 400khz and 600khz spectral mask (dbc/30khz) 6mhz offset noise floor (dbc/100khz) ?60 ?65 ?50 ?55 ?95 ?105 1.0 1.5 2.0 2.5 3.0 3.5 4.0 evm% ?5 ?7 ?1 1 ?9 ?1 3 ?3 ?1 1 5 channel power (dbm) 3 03570-0067 peak noise floor 400khz 600khz average noise floor evm ?110 ?90 ?80 ?85 ?100 ?70 ? 75 400khz and 600khz spectral mask (dbc/30khz) 6mhz offset noise floor (dbc/100khz) ?60 ?65 ?50 ?55 ?95 ? 105 1.0 1.5 2.0 2.5 3.0 3.5 4.0 evm% channel power (dbm) 03570-0068 peak noise floor 400khz 600khz average noise floor evm ?6 ?8 ?1 2 ?1 0 ?1 4 ?4 ?2 0 2
data sheet ad8349 rev. b | page 23 of 28 soldering informatio n the ad8349 is available in a 16 - lead tssop package with an exposed paddle. the exposed paddle must be soldered to the exposed metal of a ground plane for a lowered thermal impedance and reduced inductance to ground. this results in a junction - to - air thermal impedance ( ja ) of 30c/w. if multiple ground planes are present, the area u nder the exposed paddle should b e stitched together with vias. lo generation using plls analog devices has a line of plls that can be used for generating the lo signal. table 4 lists the plls together with their maximum frequency and phase noise performance. table 4 . adi pll selection table adi model frequency f in (mhz) at 1 khz phase noise dbc/hz, 200 khz pfd adf4111bru 1200 C 78 adf4111bcp 1200 C 78 adf4112bru 3000 C 86 adf4112bcp 3000 C 86 adf4117bru 1200 C 87 adf4118bru 3000 C 90 analog devices also offers the adf4360 fully integrated synthesizer and vco on a single chip that offers differential outputs for driving the local oscillator input of the ad8349. this means that the user can eliminate the use of the balun necessary for the single - ended - to - differential conversion. the adf4360 comes as a family of chips with six operating frequency ranges. one can be chosen depending on the local oscillator frequency required. the user should be aware that while the use of the integrated synthesizer might come at the expense of slightly degraded noise performance from the ad8349, it can be a much cheaper alternative t o a separate pll and vco solution. figure 61 shows the options available. table 5 . adf4360 family operating frequencies adi model output freq uency range (mhz) adf4360 -1 2150/2450 adf4360 -2 1800/2150 adf4360 -3 1550/1950 adf4360 -4 1400/1800 adf4360 -5 1150/1400 adf4360 -6 1000/1250 adf4360 -7 lower frequencies set by external l transmit dac options the ad9777 recommended in the previous sections of this data sheet is by no means the only dac that can be used to drive the ad8349. there are other dacs that are appropriate, depending on the level of performance required. table 6 lists the dual tx - dacs that adi offers. table 6 . adi dual tx C dac selection table part resolution (bits) update rate (msps min) ad9709 8 125 ad9761 10 40 ad9763 10 125 ad9765 12 125 ad9767 14 125 ad9773 12 160 ad9775 14 160 ad9777 16 160
ad8349 data sheet rev. b | page 24 of 28 evalua t i on board a populated ad8349 evaluation board is available. the ad8349 has an exposed paddle underneath the package, which is soldered to the board. the evaluation board is designed without any components on the underside of the board so that heat may be applied under the ad8349 for easy removal and replacement of the dut. figure 66 . layout of evaluation board, top layer figure 67 . evaluation board silkscreen table 7 . evaluation board configuration options component function default condition tp1, tp4, tp3 power supply and ground vector pins. not applicable sw1, enop, tp2 output enable: place in the a position to connect the enop pin to +v s via pull - up resistor r10. place in the b position to disable the device by grounding the pin enop through a 49.9 pull - down resistor. the device may be enabled via an external voltage a pplied to the sma connector enop or tp2. sw1 = a r1, r2, r5, r9, c8 C c11 baseband input filters: these components can be used to implement a low - pass filter for the baseband signals. r1, r2, r5, r9 = 0 , c8 C c11 = open 03570-0-074 yuping toh mike chowkwanyun 03570-0-073
data sheet ad8349 rev. b | page 25 of 28 figure 68 . evaluation board schematic 03570-0-072 c5 100pf c6 0.1f qp qn c2 100pf c1 100pf lo r4 200? r3 200? r6 open t 1 et c -1 -1 -1 3 1 2 3 4 5 6 7 8 16 15 14 13 12 10 9 11 ibbp ibbn com1 com1 loin loip vps1 enop qbbp qbbn com3 com3 vps2 vout com3 com2 tp2 enop ip in r8 49.9? enop c7 100pf vout +v s +v s ad 8349 r2 0? b a r10 10k? c9 open tp1 gnd c10 open r5 0? r11 0? tp3 vpos c8 open r1 0? r9 0? tp4 gnd c11 open c3 0.1f c4 100pf r7 0?
ad8349 data sheet rev. b | page 26 of 28 characterization set ups ssb setup the primary setup used to characterize the ad8349 is shown in figure 69 . this setup was used to evaluate the product as a single - sideband modulator. the interface board has circuitry that converts the single - ended i and q inputs from the arbitrary function generator to differential inputs with a dc bias of 400 mv. additionally, the interface board provides connections for power supply routing. the hp34970a and its associ ated plug - in 34901 were used to monitor power supply currents and voltages being supplied to the ad8349 characterization board. two hp34907 plug - ins were used to provide additional miscellaneous dc and control signals to the interface board. the lo input was driven directly by an rf signal generator and the output was measured directly with a spectrum analyzer. with the i channel driven by a sine wave and the q channel by a cosine wave, the lower sideband is the single sideband (ssb) output. the typical ss b output spectrum is shown in figure 53. figure 69 . characterization board ssb test setup ieee hp34970a d1 d2 d3 34901 34907 34907 d1 d2 d3 interf a ce bo ard i_in q_in output_1 output_2 arb function gen ieee tekafg2020 vps1 vn gnd vp +15v max com +25v max ?25v max hp3631 ieee ad8349 characterization board p1 in ip qp qn enop v out p1 in ip qp qn rfout ieee agilent e4437b lo ieee pc controller spectr um anal yzer rf i/p ieee hp8561e 03570-0-076
data sheet ad8349 rev. b | page 27 of 28 outline dimensions figure 70. 16-lead thin shrink smal l outline with exposed pad [tssop_ep] (re-16-2) dimensions shown in millimeters ordering guide model 1 temperature range (c) package description package option ad8349are-reel7 C40 to +85 16-lead tssop_ep, 7" tape and reel re-16-2 AD8349AREZ C40 to +85 16-lead tssop_ep, tube re-16-2 AD8349AREZ-rl7 C40 to +85 16-lead tssop_ep, 7" tape and reel re-16-2 ad8349-evalz evaluation board 1 z = rohs compliant part. compliant to jedec standards mo-153-abt 16 9 8 1 5.10 5.00 4.90 4.50 4.40 4.30 6.40 bsc top view bottom view 0.65 bsc 0.15 0.05 coplanarity 0.10 1.20 max 1.05 1.00 0.80 0.30 0.19 0.20 0.09 3.05 3.00 sq 2.95 8 0 0.75 0.60 0.45 02-17-2012-a for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. exposed pad seating plane
ad8349 data sheet rev. b | page 28 of 28 notes ? 2003 C 2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d03570 - 0 - 2/12(b)

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